1. Field of the Invention
This invention relates to a solid state image sensor arrangement, and more particularly to a solid state image sensor arrangement in which a solid state image pickup device is driven in response to clock signals for producing effective video signals in a raster scanning fashion.
2. Description of the Prior Art
In a known manner, there are problems proper to solid state image pickup devices, that is, noises of fixed pattern generated in the devices, and noises of synchronous nature produced in the exterior driving circuits. While the solution to the former problem has been suggested in many ways in the prior art, the latter problem is more intricate and can be met only by practical circuit designing.
In the prior art driving circuit for solid state image pickup devices, the maximum required frequency, such as the original frequency of 14.318 MHz, is divided for producing various driving clocks, sync signals or other control signals for formation of picture or image signals. Such frequency division is effected during the periods other than the blanking periods, that is, during video signal periods as well. The result is that excess pulse current flows in the frequency dividing circuits or the logic circuits connected thereto especially during the time a number of counters are incremented synchronously, these pulses mixing into picture signals through various routes. This initiates periodic noises, deteriorating the quality of the reproduced image.
Since these periodic noises are not to be dealt with sufficiently by resorting simply to practical circuit designing, it is proposed to halt the frequency divider during the effective image period and to drive the divider only during blanking period by a driving circuit ("Drive Pulse Producing Circuit for Solid State Camera Devoid of Sync Noises", by Sato et al. Television Association of Japan, 1981, Report for National Congress, pages 103 to 104). However, this drive circuit is complicated due to provision of countercontrol circuits for stopping the frequency division during the effective image scanning period.
In consideration that the sync noise is derived from the frequency dividing circuit, it has also been suggested to replace the frequency dividing circuit by a ring counter making use of the shift register circuit designed to recycle during one horizontal scanning (1H) period, with various signals being derived by means of decoders from the outputs of plural counter stages corresponding to the blanking period ("Novel Sync Circuit for Solid State Color Camera", by Nishizawa et al. Television Association of Japan, 1982, Report for National Congress, pages 91 to 92).
The latter circuit can be connected naturally to a MOS type image sensor so as to be used as driving circuit for driving the MOS type image sensor. A shift register circuit corresponding to the effective image scanning period is annexed to the MOS type image sensor for driving the read-out circuit. Therefore, when the latter circuit is connected to the MOS type image sensor, at least register stages corresponding to the effective image period are used in redundancy, resulting in a costly and complex circuit.
Moreover, in implementing the driving circuit, it is necessary to monitor and compensate for errors caused during pulse cycling so as to enhance circuit reliability. For example, a circuit need be provided for sensing all zero or plural pulses. However, even granting that such sensing circuit results in prevention of malfunction of the driving circuit, it is not sufficiently effective to assure a foolproof pulse driving in the shift register adapted for driving the read-out circuit of the MOS type image sensor. Thus it is not possible with the aforementioned driving circuit to directly monitor and compensate for read-out error from the MOS type image sensor, despite provision of the sensing circuit.